Grid-forming inverters, particularly those employing the virtual synchronous machine (VSM) concept, are essential for providing stability and synthetic inertia in future low-inertia power systems by emulating a voltage source behind an internal impedance. Within these control architectures, virtual admittance is a concept implemented to represent this internal impedance, translating the VSM's internal generated voltage into a virtual current reference for the underlying cascaded control loops. Due to the limited overcurrent capability of power semiconductors, this current reference must be passed through a limitation stage. This paper investigates a critical but often overlooked design choice in this process: the selection of the current feedback signal for the active and reactive power control loops and its impact on the overall system dynamics.

Unlike conventional approaches that often switch from virtual to measured currents after grid synchronization, this study evaluates the performance of maintaining a consistent feedback strategy throughout all operating phases, including synchronization, steady-state, and fault conditions. We compare two distinct architectures: (I) feedback utilizing the measured, limited current (e.g., at the transformer terminals), and (II) feedback utilizing the non-limited, virtual current generated by the virtual admittance. While using measured currents naturally accounts for LC-filter losses, utilizing virtual currents requires additional filter compensation to ensure accurate power injection at the point of common coupling.

During grid faults, the choice of feedback significantly dictates the load of the virtual synchronous machine. While measured currents reflect physical reality, they introduce severe nonlinearities and forced power imbalances into the VSM’s differential equations, often leading to rapid phase-angle drift. Conversely, utilizing the virtual current acts as a natural anti-windup mechanism, maintaining "virtual inertia" even during hardware saturation. The strategies are evaluated against the characteristic test scenarios defined in the VDE FNN guideline 'Technical requirements for grid-forming capabilities including provision of inertia' (January 2026) using time-domain simulations and experimental validation. The results highlight the trade-offs between hardware-accurate feedback and algorithmic stability, specifically regarding the necessity of filter compensation and the impact on stability.

The studies are being carried out as part of a doctorate.